Circuit board assembly

As the best circuit board manufacturing company in China, I think we have the responsibility and obligation to explain the knowledge of circuit board design to everyone.

The layers that need to be output are:

1. We need to produce the drilling file NCDrill.

2. Requires wiring layers, including top/middle/bottom wiring layers;

3. FS Technology believes that the power supply layer is also very important, including the VCC layer and the GND layer;

4. The silk screen layer includes the top silk screen/bottom silk screen;

5. The solder mask layer includes the top solder mask and the bottom solder mask;

2. If we set the power layer to Split/Mixed, then select Routing in the Document item of the AddDocument window and use PourManager's Plane Connect to copper-clad the PCB diagram before each output of the light drawing file; if it is set to CAMPlane, select Plane should add Layer25 when setting the Layer item and select Pads and Vias in the Layer25 layer.

3. Press Device Setup in the Device Setup window to change the value of Aperture to 199.

4. Select BoardOutline when setting the Layer of each layer.

5. Do not select PartType when setting the Layer of the silk screen layer, select the Outline Text Line of the top bottom layer and the silk screen layer.

6. When setting the Layer of the solder mask, select Via to indicate that there is no solder mask on the via. Generally, the vias will be covered by a solder layer.

PCB EMI design of FS Technology

"With the improvement of IC device integration, the gradual miniaturization of equipment and the increasing speed of devices, the EMI problem in electronic products is also more serious. From the point of view of system equipment EMC/EMI design, in the equipment PCB Dealing with the EMC/EMI problem in the design stage is the most effective and lowest cost method to make the system equipment meet the electromagnetic compatibility standard.

In order to avoid this EMI problem, FS Technology introduces the standard steps of EMI design in PCB design.

1. Power processing of IC

Make sure that the power PIN of each IC has a 0.1μF decoupling capacitor. For BGA CHIP, it is required that there are 8 capacitors of 0.1μF and 0.01μF at the four corners of the BGA. For the power supply of the trace, pay special attention to adding filter capacitors, such as VTT, etc. Not only does this have an impact on stability, it also has a big impact on EMI. Generally, the decoupling capacitor still needs to follow the requirements of the chip manufacturer.

2. The routing of the clock line should be handled carefully. FS Technology believes that the following points need to be paid attention to:

1. It is recommended to take the clock line first.

2. For clock lines with a length of more than 12 inches, if the frequency is greater than 20M, the number of vias cannot exceed 2.

3. For a clock line with a frequency less than 66M, the number of each via cannot exceed 3.

4. For clock lines with a frequency greater than or equal to 66M, the number of vias cannot exceed 2.

5. In principle, the clock line cannot pass through the island

In principle, all clock lines cannot cross the island (cross division). Three situations of crossing the island are listed below.

5.1 When the cross-island appears between the power island and the power island, the clock line should be routed on the back of the fourth layer, the third layer (power layer) has two power islands, and the fourth layer must be routed across. the two islands;

5.2 When the cross-island appears between the island and the stratum. At this time, the clock line is routed on the first layer, and the middle of the second layer (ground layer)

There is an island in between, and the wiring of the first layer must cross the island, which is equivalent to the ground wire being interrupted.

5.3 There is no copper laying under the clock line. If the conditions are limited, it is impossible not to pass through the island. Ensure that the clock line with a frequency greater than or equal to 66M does not pass through the island. If the clock line with a frequency less than 66M passes through the island, a decoupling capacitor must be added to form a mirror path. . When faced with the choice of two vias and one pass through the island, choose to pass through the island once;

Born to create better PCB circuit boards for customers - FS Technology

On a PCB with a patch, in order to locate the entire PCB, it is usually necessary to place the optical positioning points on the four corners of the PCB, generally three.

Common reference points mainly include three types of board reference points, unit reference points and local reference points.

1. Reference point structure

(1) Panel datum point and unit datum point.

Shape/Size: 40mil diameter solid circle.

FS Technology Solder Mask Window: A circle concentric with the reference point, the size is twice the diameter of the reference point.

A 2mm diameter edge requires a round or octagonal copper wire as a guard ring.

The internal background of the optical positioning reference symbols on the same board should be the same, that is, whether there is copper foil under the three reference symbols should be consistent.

(2) Local datum point.

Parts such as QFP and pitch ≤0.4mm BGA, CSP, FC need to place local fiducials.

Size/Shape: Solid circle, 40mil diameter.

Solder mask opening: The size is processed according to the ordinary pad, and the outer ring copper ring cannot.

2. Place the datum point:

General principles:

The veneer for processing SMT equipment must be placed with fiducial points.

The number of single-sided reference points is greater than or equal to 3.

For single-sided layout, simply place the datum point on the component face.

..When A5I5^0L-z1m+PPCB is double-sided layout, the fiducials are placed on both sides.

For the datum points placed on both sides, except for mirror splicing, the positions of the datum points on both sides are basically the same.

(1) The reference point for FS Technology to place the puzzle.

Panel datum points and cell datum points need to be placed.

There are three panel fiducials and unit fiducials.

The edges of the board are distributed in an L shape, and keep them as far away as possible.

Figure A below shows the location requirements for the panel datum points.

When using a mirror-symmetrical panel, the reference point on the auxiliary side must meet the requirements of overlapping after flipping, as shown in Figure B below.

(2) The datum point for placing the cell board.

The number of reference points is three, distributed in an L shape on the edge of the board, and the distance between each reference point should be as far as possible.

The edge of the reference point must be greater than 5mm.

If all four edges are not guaranteed to be satisfied, the transmission edge should at least satisfy the requirements.